Printed circuit boards (PCBs), printed wire boards (PWBs), and similar structures typically include a plurality of conductive lines or traces superimposed or “printed” on one or more sides of a non-conductive substrate. Electronic components can be mounted to the substrate and interconnected by means of wire bonds and/or solder attachments to the conductive lines. FIG. 1, for example, is an isometric view illustrating a portion of a PCB 100 configured in accordance with the prior art. The PCB 100 supports a plurality of electronic components 130 (illustrated schematically in FIG. 1 and identified individually as electronic components 130a -d). The electronic components 130 can include processing devices, routing devices, memory devices and other types of electronic devices typically found on conventional circuit boards in computers, cell phones, personal data assistants, and other electronic products.
The electronic components 130 are mounted to a non-conductive substrate 104 and are interconnected by means of an electrical circuit 110. The electrical circuit 110 includes a first conductive line 111 and a second conductive line 112 disposed on a first surface 101 of the non-conductive substrate 104. The electrical circuit 110 further includes a third conductive line 113 and a fourth conductive line 114 disposed on a second surface 102 of the non-conductive substrate 104 opposite to the first surface 101. The first conductive line 111 is electrically connected to the third conductive line 113 by conductive material 123 in a first passage 121 that extends vertically through the non-conductive substrate 104 from the first conductive line 111 to the third conductive line 113. The second conductive line 112 is similarly connected to the fourth conductive line 114 by conductive material 124 in a second passage 122 that extends vertically through the non-conductive substrate 104 from the second conductive line 112 to the fourth conductive line 114. The passages 121 and 122 are often referred to by those in the art as “plated through-holes” or “vias.”
Each of the conductive lines 111-114 includes a corresponding contact or terminal (identified individually as a first terminal 115, a second terminal 116, a third terminal 117, and a fourth terminal 118, respectively). The first electronic component 130a is electrically connected to the first terminal 115 by a wire bond or solder attachment 131 (shown schematically). The second electronic component 130b, the third electronic component 130c, and the fourth electronic component 130d are electrically connected to the second terminal 116, the third terminal 117, and the fourth terminal 118, respectively, in a similar manner.
In the prior art example of FIG. 1, the conductive path between the first terminal 115 and the third terminal 117, and the conductive path between the second terminal 116 and the fourth terminal 118, are relatively straight and direct. In practice, however, it is not uncommon for the paths between two or more pairs of corresponding terminals to cross each other.
FIG. 2 is an isometric view illustrating a portion of a prior art PCB 200 in which the paths between two pairs of corresponding terminals cross each other. Many of the features of the PCB 200 are at least generally similar in structure and function to corresponding features of the PCB 100 described above. For example, the PCB 200 includes the first conductive line 111 and the second conductive line 112 disposed on the first surface 101 of the non-conductive substrate 104. The PCB 200 also includes the first passage 121 and the second passage 122 extending vertically through the non-conductive substrate 104. In contrast to the PCB 100 described above, however, in the example of FIG. 2 the first terminal 115 is electrically connected to the fourth terminal 118, and the second terminal 116 is electrically connected to the third terminal 117.
To accommodate the change in terminals, the PCB 200 includes a third conductive line 213 extending from the first passage 121 to the fourth terminal 118, and a fourth conductive line 214 extending from the second passage 122 to the third terminal 117. As illustrated in FIG. 2, the third and fourth conductive lines 213 and 214 describe somewhat indirect paths between the passages 121 and 122 and the respective terminals. Specifically, the third conductive line 213 jogs away from the third terminal 117 to provide clearance for the fourth conductive line 214, and the fourth conductive line 214 routes around the first passage 121 before proceeding toward the third terminal 117.
There are a number of shortcomings associated with indirect conductive lines such as those described above with reference to FIG. 2. One shortcoming is that the increased line length increases the resistance and inductance in the circuit, thereby increasing the susceptibility to undesirable noise-related effects such as cross-talk. Another shortcoming is that the increased line length can reduce signal strength and increase signal delay. A further shortcoming is the additional material and complexity associated with manufacturing jogged, rather than straight, conductive lines.